China SHANGHAI FAMOUS TRADE CO.,LTD company news

4 inch 6 inch lithium tantalate wafer PIC-- Lithium tantalate waveguide on low loss insulator for nonlinear photonics on chip   Abstract: We have developed a lithium tantalate waveguide on 1550 nm insulator with a loss of 0.28 dB/cm and a toroidal resonator quality factor of 1.1 million. The application of χ(3) nonlinearity in nonlinear photonics is studied.   1. Introduce   Waveguide technology based on lithium niobate insulators (LNoI) has made great progress in the field of ultra-high speed modulators and on-chip nonlinear photonics due to their favorable χ(2) and χ(3) nonlinear properties and the strong optical limiting effect generated by the "on-insulator" structure [1-3]. In addition to LN, lithium tantalate (LT) has also been studied as a nonlinear photonic material. Compared with LN, LT has a higher optical damage threshold and a wider optically transparent window [4, 5], although its optical parameters are similar to those of LN, such as refractive index and nonlinear coefficient [6,7]. LToI is therefore another strong material candidate for high-optical power nonlinear photonics applications. In addition, LToI is emerging as a major material for surface acoustic wave (SAW) filter parts for high-speed mobile and wireless applications. In this context, LToI chips may become a more common material for photonic applications. However, only a few LTOI-based photonic devices have been reported to date, such as microdisk resonators [8] and electro-optical phase shifters [9]. In this paper, we introduce a low loss LToI waveguide and its application in ring resonators. In addition, the χ(3) nonlinearity of the LToI waveguide is provided.       Highlight   Provide 4 "-6" LTOI wafer, thin film lithium tantalate wafer, top thickness of 100nm-1500nm, domestic technology, mature process   Other products;   LTOI; Lithium niobate's most powerful competitor, thin film lithium tantalate wafers   LNOI; The 8-inch LNOI supports the mass production of lithium niobate thin films on a larger scale   LT fabrication on insulator waveguides   In this study, we used 4-inch LTOI wafers. The top LT layer is a commercial 42° rotary Y-cut LT substrate for SAW devices that directly bonds to a Si substrate with a 3 µm thick thermal oxide layer and performs an intelligent cutting process. Figure 1(a) shows the top view of the LToI wafer, where the top LT layer has a thickness of 200 nm. We evaluated the surface roughness of the top LT layer using atomic force microscopy (AFM)     Figure 1. (a) Top view of the LToI wafer, (b) AFM image of the top LT layer surface, (c) PFM image of the top LT layer surface, (d) schematic cross section of the LToI waveguide, (e) calculated outline of the basic TE mode, And (f) SEM image of LToI waveguide core before SiO2 coating deposition.   As shown in Figure 1 (b). The surface roughness is less than 1 nm, and no scratch lines are observed. In addition, we examined the polarization of the top LT layer using a piezoelectric response force microscope (PFM), as shown in Figure 1 (c). Even after the bonding process, we confirmed that uniform polarization was maintained.   Using the LTOI substrate, we fabricate the waveguide as follows. First, we deposit a metal mask layer for subsequent LT dry etching. We then perform electron beam (EB) lithography to define the waveguide core pattern on top of the metal mask layer. Next, we transferred the EB resist pattern to the metal mask layer by dry etching. After that, the LToI waveguide core is formed by electron cyclotron resonance (ECR) plasma etching. Finally, we removed the metal mask layer by a wet process and deposited the SiO2 cover layer by plasma enhanced chemical vapor deposition. Figure 1 (d) shows the schematic cross-section of the LToI waveguide. The total core height, plate height and core width are 200, 100 and 1000 nm respectively. Note that to facilitate fiber coupling, the core width is extended to 3 µm at the waveguide edge. Figure 1 (e) shows the calculated distribution of light wave intensity for the basic transverse electric field (TE) mode at 1550 nm. Figure 1 (f) shows a scanning electron microscope (SEM) image of the LToI waveguide core before the SiO2 coating was deposited.     Waveguide characteristic   First, we evaluate the linear loss properties by feeding TE polarized light from an amplified self-emitting light source at 1550 nm into LToI waveguides with varying lengths. The propagation loss is obtained from the slope of the relationship between the length of the waveguide and the transmittance of each wavelength. The measured propagation losses are 0.32, 0.28 and 0.26 dB/cm at 1530, 1550 and 1570 nm, respectively, as shown in Figure 2 (a). The manufactured LToI waveguides exhibit fairly low loss performance similar to the most advanced LNOI waveguides [10].   We then evaluate χ(3) nonlinearity through the wavelength conversion generated by the four-wave mixing process.   We fed a 1550.0 nm continuous wave pump light wave and a 1550.6 nm signal light wave into a 12 mm long waveguide. As shown in Figure 2 (b), the phase conjugated (idle) light wave signal strength increases with increasing input power. The illustration in Figure 2 (b) shows a typical output spectrum for four-wave mixing. From the relationship between the input power and the conversion efficiency, we can estimate the nonlinear parameter (γ) to be about 11 W-1m     Figure 3. (a) Microscope image of the fabricated ring resonator. (b) Transmission spectrum of a ring resonator with various gap parameters. (c) Measurements of a ring resonator with a gap of 1000 nm and Lorentzian fitting transmission spectra   Applied to ring resonators   Next, we fabricated an LTOI ring resonator and evaluated its characteristics. Figure 3 (a) shows an optical microscope image of the fabricated ring resonator. The ring resonator has a "runway" configuration consisting of a curved area with a radius of 100 µm and a straight area with a length of 100 µm. The gap width between the ring and the bus waveguide core varies in increments of 200 nm, i.e. 800, 1000, and 1200 nm. Figure 3 (b) shows the transmission spectrum for each gap, showing that the extinction ratio varies with the gap. From these spectra, we determined that the 1000 nm gap provides almost critical coupling conditions, as it has a maximum extinction ratio of -26 dB. Using a critically coupled resonator, we estimate the factor of quality (Q factor) by fitting the linear transmission spectrum through Lorentzian, and obtain an internal Q factor of 1.1 million, as shown in Figure 3 (c). To our knowledge, this is the first demonstration of a waveguide coupled LToI ring resonator. In particular, the Q-factor value we obtained is much higher than that of the fiber-coupled LToI microdisk resonator [9]     Conclusion   We have developed an LTOI waveguide with a loss of 0.28 dB/cm at 1550 nm and a ring resonator Q value of 1.1 million.   The performance obtained is comparable to that of the most advanced LNoI low-loss waveguides. In addition, the χ(3) nonlinearity of fabricated LTOI waveguides in on-chip nonlinear applications is also studied.     * Please contact us for any copyright concerns, and we will promptly address them.

Breakthrough! SAN An Optoelectronics 2000V SIC device released   Recently, according to the well-known foreign semiconductor media "Today semiconductor" revealed that China's wide band gap semiconductor materials, components and foundry service provider SAN 'an Optoelectronics Co., LTD., launched a series of SIC power products, including a series of 1700V and 2000V devices.     At present, the mainstream wafer foundries at home and abroad have 1700V SiC diodes to achieve mass production. However, from 650V, 900V, 1200V all the way to 1700V, it seems to have hit the limits of the process. Many domestic manufacturers have given up on high performance and turned to Costdown. In this context, SAN 'an's continuous iteration in high performance fully demonstrates its firm determination in research and development, which is truly commendable. "One inch long, one inch strong!"   First of all, the main highlights of this new product release:   >1700V silicon carbide MOSFET, on-resistance of 1000mΩ;   >1700V silicon carbide diode, available in 25A and 50A models;   >2000V 40A silicon carbide diode, 20A version is planned for the end of 2024;   > 2000V 35mΩ silicon carbide MOSFETs under development (release date 2025)   The new silicon carbide devices offer superior efficiency compared to traditional silicon-based alternatives in a wide range of applications, including:   > PV module inverters and power optimizers; > Electric vehicle fast charging station; > Energy storage system; > High-voltage power grids and energy transmission networks. In scenarios such as HVDC transmission and smart grids, high-voltage SiC devices can better withstand high voltages, reduce energy losses, and improve the efficiency of power transmission. For example, in long-distance transmission lines, high-voltage SiC devices can reduce energy loss due to voltage conversion, so that electrical energy is more efficiently transmitted to the destination. Moreover, its stable performance can reduce the probability of system failure caused by voltage fluctuation or overvoltage, and enhance the stability and reliability of the power system.   For electric vehicle inverters, on-board chargers and other components, high-voltage SiC devices can withstand higher voltages, improving the power performance and charging speed of electric vehicles. High-voltage SiC devices can operate at higher voltages, which means that at the same current, they can output higher power, thereby improving the acceleration performance and driving range of electric vehicles.     In photovoltaic inverters, high-voltage SiC devices can better adapt to the high voltage output of photovoltaic panels, improve the conversion efficiency of the inverter, and increase the power generation of photovoltaic power generation system. At the same time, the high-voltage SiC device can also reduce the size and weight of the inverter, which is easy to install and maintain. 700V silicon carbide MOSFETs and diodes are particularly suitable for applications that require a higher voltage margin than traditional 1200V devices. At the same time, 2000V silicon carbide diodes can be used in high DC bus voltage systems up to 1500V DC to meet the needs of industrial and power transmission applications. "As the world transitions to cleaner energy and more efficient power systems, the demand for high-performance power semiconductors continues to grow," noted Vice President of Sales & Marketing. "Our expanded silicon carbide portfolio demonstrates our commitment to driving innovation in this critical area." The new 1700V and 2000V silicon carbide devices are now available for sample trial.    

In the production process of silicon-based integrated circuits, the silicon wafer is one of the key materials. The diameter and size of the wafer play a crucial role throughout the entire manufacturing process. The size of the wafer not only determines the number of chips that can be produced but also has a direct impact on cost, capacity, and quality.   1. Historical Development of Wafer Sizes In the early days of integrated circuit production, the diameter of wafers was relatively small. In the mid-1960s, the diameter of silicon wafers was typically 25 mm (1 inch). With technological advancements and the increasing demand for more efficient production, wafer sizes have continuously grown. In modern semiconductor manufacturing, 150 mm (6 inches), 200 mm (8 inches), and 300 mm (12 inches) wafers are commonly used.     This change in size brings significant advantages. For example, a 300 mm silicon wafer has more than 140 times the surface area of a 1-inch wafer from 50 years ago. This increase in surface area has greatly improved production efficiency and cost-effectiveness.   2. Impact of Wafer Size on Yield and Cost Yield Increase Larger wafers allow for the production of more chips on a single wafer. Assuming the structural size of the chips (i.e., the design and physical space required) is the same, a 300 mm wafer can produce more than twice as many chips as a 200 mm wafer. This means that larger wafers can significantly boost yield. Cost Reduction As the wafer area increases, yield increases, while some fundamental steps in the manufacturing process (such as photolithography and etching) remain unchanged regardless of wafer size. This allows production efficiency to improve without adding process steps. Additionally, larger wafers enable the distribution of manufacturing costs over a greater number of chips, thus reducing the cost per chip. 3. Improvement of Edge Effects in Wafers When the diameter of the wafer increases, the curvature of the wafer edge decreases, which is crucial for reducing edge loss. Chips are typically rectangular, and due to the curvature at the wafer's edge, it may not be possible to accommodate complete chips. In smaller wafers, edge loss is greater due to higher curvature. However, in 300 mm wafers, this curvature is relatively smaller, which helps minimize edge loss.     4. Wafer Size Selection and Equipment Compatibility The size of the wafer affects equipment selection and production line design. As wafer diameters increase, the equipment needed must also be adapted accordingly. For example, equipment for processing 300 mm wafers typically requires more space and different technical support and is generally more expensive. However, this investment can be offset by higher yields and lower per-chip costs. In addition, the manufacturing process for 300 mm wafers is more complex compared to 200 mm wafers, involving higher-precision robotic arms and sophisticated handling systems to ensure the wafers are not damaged throughout the production process.   5. Future Trends in Wafer Sizes Although 300 mm wafers are already widely used in high-end manufacturing, the industry continues to explore even larger wafer sizes. Research and development for 450 mm wafers have already begun, with potential commercial applications expected in the future. The increase in wafer size directly enhances production efficiency, reduces costs, and minimizes edge losses, making semiconductor manufacturing more economical and efficient.     Product Recommendation   Si wafer, Silicon Wafer, Si Substrate, Silicon Substrate, , , , 1inch Si wafer, 2inch Si wafer, 3inch Si wafer, 4inch Si wafer, Si monocrystalline substrate, Silicon monocrystalline wafer

micro-LED based on self-supporting GaN   Chinese researchers have been exploring the benefits of using self-supporting (FS) gallium nitride (GaN) as a substrate for miniature light emitting diodes (leds) [Guobin Wang et al, Optics Express, v32, p31463, 2024]. In particular, the team has developed an optimized indium Gallium nitride (InGaN) multi-quantum well (MQW) structure that performs better at lower injection current densities (about 10A/cm2) and lower drive voltages, suitable for advanced microdisplays used in augmented reality (AR) and virtual reality (VR) installations, in which case, The higher cost of self-supporting Gans can be compensated for by improved efficiency.   The researchers are affiliated with the University of Science and Technology of China, Suzhou Institute of Nanotechnology and Nanobionics, Jiangsu 3rd Generation Semiconductor Research Institute, Nanjing University, Soozhou University and Suzhou Nawei Technology Co., LTD. The research team believes that this micro-LED is expected to be used in displays with ultra-high pixel density (PPI) submicron or nanometer LED configurations.   The researchers compared the performance of micro-leds manufactured on a self-supporting GaN template and a GaN/ sapphire template (Figure 1).     Figure 1: a) micro-LED epitaxial scheme; b) micro-LED epitaxial film; c) micro-LED chip structure; d) Transmission electron microscope (TEM) cross-section images.     Metal-organic chemical vapor deposition (MOCVD) epitaxial structure includes 100nm N-type aluminum Gallium nitride (n-AlGaN) carrier diffusion/expansion layer (CSL), 2μm n-GaN contact layer, 100nm low silane unintentional doping (u-) GaN high electron mobility layer, 20x(2.5nm/2.5nm) In0.05Ga0.95/GaN strain release layer (SRL), 6x(2.5nm/10nm) blue InGaN/GaN multi-quantum well, 8x(1.5nm/1.5nm) p-AlGaN/GaN Electron Barrier layer (EBL), 80nm P-gan hole injection layer and 2nm heavily doped p+-GaN contact layer.   These materials were made into leds with a diameter of 10μm and with indium tin oxide (ITO) transparent contact and silicon dioxide (SiO2) sidewall passivation. The chips manufactured on the heteroepitaxial GaN/ sapphire template show a large performance difference. In particular, the intensity and peak wavelength vary greatly depending on the location within the chip. At a current density of 10A/cm2, a chip on the sapphire showed a wavelength shift of 6.8nm between the center and the edge. Of the two chips from the sapphire wafer, one is only 76 percent as strong as the other.   For chips made on self-supporting GaN, the wavelength variation is reduced to 2.6nm, and the strength performance of the two different chips is more similar. The researchers attribute the wavelength uniformity variation to different stress states in the homogeneous and heterogeneous structures: Raman spectroscopy shows residual stresses of 0.023GPa and 0.535GPa, respectively.   The cathode luminescence shows that the dislocation density of heteroepitaxial plates is about 108/cm2, while that of homoepitaxial plates is about 105/cm2. "The lower dislocation density can minimize the leakage path and improve the luminous efficiency," commented the research team. Compared with heteroepitaxial chips, although the reverse leakage current of the homoepitaxial LED is reduced, the current response under the forward bias is also reduced. Despite the lower current, chips on self-supporting Gans have higher external quantum efficiency (EQE) : 14% in one case, compared with 10% for chips on sapphire templates. By comparing the photoluminescence performance at 10K and 300K (room temperature), the internal quantum efficiency (IQE) of the two chips is estimated to be 73.2% and 60.8%, respectively.   Based on the simulation work, the researchers designed and implemented an optimized epitaxial structure on a self-supporting GaN that improves the external quantum efficiency and voltage performance of the microdisplay at lower injection current densities (Figure 2). In particular, homoepitaxy achieves a thinner barrier and sharp interface, whereas the same structures achieved in heteroepitaxy show a more blurred profile under TEM examination.       Figure 2: Transmission electron microscope images of the multi-quantum well region: a) original and optimized homoepitaxy structures, and b) optimized structures realized in heterogeneous epitaxy. c) External quantum efficiency of homogeneous epitaxial micro-LED chip, d) current-voltage curve of homogeneous epitaxial micro-LED chip.     The thinner barrier partly simulates the V-shaped pits that can easily form around the dislocation. In heteroepitaxial leds, V-shaped pits have been found to have beneficial performance effects, such as improved hole injection into the luminous region, in part due to a thinning barrier in the multi-quantum well structure around the V-shaped pits.   When the injection current density is 10A/cm2, the external quantum efficiency of the homogeneous epitaxial LED increases from 7.9% to 14.8%. The voltage required to drive 10μA current has been reduced from 2.78V to 2.55V.   ZMSH Sulotion for GaN wafer The growing demand for high-speed, high-temperature and high power-handling capabilities has madethe semiconductor industry rethink the choice of materials used as semiconductors. For instance, as various faster and smaller computing devices arise, the use of silicon is making it difficult to sustain Moore’s Law. But also in power electronics, So GaN semiconductor wafer is grown out for the need. Due to its unique characteristics (high maximum current, high breakdown voltage, and high switching frequency), Gallium Nitride GaN is the unique material of choice to solve energy problems of the future. GaN based systems have higher power efficiency, thus reducing power losses, switch at higher frequency, thus reducing size and weight.

SiC New Opportunity! Mercedes actually uses it here   Recently, silicon carbide has opened up a new application scenario in the automotive market - electric force extractor (ePTO), which can be widely used in trucks, commercial vehicles, construction machinery, agricultural machinery and construction equipment markets.   Why use silicon carbide for electric force extractor? Which car companies have adopted it? How big is the future market space of electric power extractor?     Silicon carbide into the electric force extractor Mercedes-Benz, Hydro Leduc, etc., has been adopted   As we all know, new energy vehicles are the largest application direction of silicon carbide semiconductors, application scenarios include main drive electronic control, OBC/DC-DC, air conditioning compressors, fuel vehicle air compressors, PTC, relays, etc., and vehicle application scenarios are still expanding.   Silicon carbide has been used in electric force take-up (ePTO) by many automotive companies.   According to an October 7 press release from CISSOID, their SiC motor control module is being used by hydraulic component manufacturer Hydro Leduc's modular ePTO, which will be used to drive the hydraulic systems of new energy trucks and other off-road vehicles.     Hydro Leduc's new ePTO uses a 76 kW brushless motor, the ME230, and a 9-piston XRe series spherical piston hydraulic pump. The motor controller uses CISSOID's three-phase 1200V/340-550A silicon carbide power module. Suitable for applications up to 650 Vdc.   This silicon carbon-based ePTO is a high-performance, efficient electro-hydraulic solution with advantages including low noise, high efficiency, low pulsation and fast speed in self-priming mode.   In fact, as early as May 2022, ZF joined forces with Mercedes-Benz Trucks to provide the latter's electric trucks with a silicon carbon-based electric power harvester system, eWorX.   Zf's eWorX system is equipped with a 50 kW rated electric motor, inverter and control unit with dedicated software, as well as a cooling system and hydraulic pump.     Working principle driving force and market space analysis of electric power harvester   POWER TAKE-OFF (PTO) is an important part of trucks, commercial vehicles, motorhomes, construction machinery, agricultural machinery and construction machinery, mainly used to drive the hydraulic system and other auxiliary functions of special equipment such as cranes, garbage trucks and concrete mixers.   Currently, more than 70% of Ptos on the market are powered by internal combustion engines. Take the hydraulic excavator as an example, its operation process is to drive the hydraulic pump through the engine, the hydraulic pump will produce high pressure fluid, and then drive the hydraulic cylinder, so that the relevant executive device to work.   Schematic diagram of internal combustion engine force extractor     As we all know, traditional trucks, non-road mobile equipment (engineering construction machinery, agricultural machinery, forestry machinery, industrial vehicles, etc.) have large fuel consumption, environmental pollution and other problems, the Ministry of Transport, the Ministry of ecological Environment and other countries around the world have introduced strict regulations to promote the electrification of these vehicles and machinery transformation. To meet the requirements of energy conservation, emission reduction and green development.   This also makes the force takeer will also shift from the internal combustion engine drive mode to electrification, and the use of battery-driven electric force takeer (ePTO) will become the mainstream.   At present, there are two electric power extractor (ePTO) schemes on the market: pure electric and hybrid, the difference is that the former is an external charging pile to charge the battery, the latter is to charge the battery through the internal combustion engine power generation, the main principle is through the inverter to convert the battery's direct current into alternating current, so as to drive the ePTO, so that the hydraulic system to work.     The advantages of ePTO are that it is in line with the trend of environmental protection and electrification, energy efficiency, quieter and more flexible design.     According to the analysis of Professor Xu Bing of Zhejiang University in 2022, the current non-road mobile machine is only a simple replacement of the electric drive system for the internal combustion engine, and the hydraulic components and systems have not changed, and the technical advantages of the motor have not been fully utilized, in the era of electrization, the hydraulic system configuration of non-road mobile machines will have many innovations and changes.   With the evolution of electric technology for special vehicles such as sanitation trucks, dump trucks, public security fire trucks, building materials mixing trucks, and hazardous chemicals trucks, ePTO will be a new blue ocean market in the future. According to Leandro Girardi, vice president of aftermarket for Eaton North America, the future growth rate for electric special purpose vehicles is 35 to 50 percent per year. Bosch believes that between 2023 and 2025, the penetration rate of electric construction machinery vehicles will be around 25%.     ZMSH Sulotion for SiC wafer 2inch 4inch 6inch 8Inch Silicon Carbide Wafer Sic Substrates Dummy Research Prime Grade   Silicon carbide (SiC), also known as carborundum, is a semiconductor containing silicon and carbon with chemical formula SiC. SiC is used in semiconductor electronics devices that operate at high temperatures or high voltages, or both.SiC is also one of the important LED components, it is a popular substrate for growing GaN devices, and it also serves as a heat spreader in high-power LEDs.  

On September 26, according to the "West Lake Science and Technology" official micro message, by West Lake University and its incubation enterprise Mu De Wei Na led the research of the "extreme thin and thin silicon carbide AR diffraction optical waveguide" scientific and technological achievements in September 24, the world's first silicon carbide AR glasses lens scene debut. It looks the same as everyday sunglasses, but compared with traditional AR glasses, it is thinner and lighter, with a single weight of only 2.7 grams and a thickness of only 0.55 mm.                According to reports, in the traditional AR diffraction optical waveguide glasses, the heat accumulation generated by the projection optical machine and the sensing and computing unit will make the device enter the overheating protection, so it can only display a small area of the screen. Different from the traditional mirror leg heat dissipation method, this silicon carbide AR glasses use the nature of the material itself, through special design, innovatively use the lens for heat dissipation, greatly improving the heat dissipation efficiency.     In addition, in order to achieve a full-color display, traditional AR glasses usually need to use multiple layers of high-refractive index glass to conduct light, which leads to thick and uncomfortable lenses. The silicon carbide AR glasses only need a waveguide to present a full-color picture with a large field of view.   It's worth mentioning that Meta launched its first true AR glasses, Orion, on September 25. Orion AR glasses feature a stylish black frame design, weigh just 98 grams, and feature silicon carbide lenses and a Micro LED micro-display.     TrendForce Consulting analysis, Orion AR glasses optical design using silicon carbide material diffraction optical waveguide, combined with JBD's three-slice full-color LEDoS technology, can achieve up to 70 degrees of field of view (FOV).        

SiC Single Crystal Growth Technology     Under normal pressure, there is no liquid phase SiC with a stoichiometric ratio of Si   equal to 1:1. Therefore, the method using melt as the raw material, commonly used for silicon crystal growth, cannot be applied to bulk SiC crystal growth. Instead, the sublimation method (PVT, Physical Vapor Transport) is employed. In this process, SiC powder is used as the raw material, placed in a graphite crucible along with a SiC substrate as the seed crystal, and a temperature gradient is established with the SiC powder side being slightly hotter. The overall temperature is then maintained between 2000°C and 2500°C. The sublimation method using SiC seed crystals is now referred to as the modified Lely method, which is widely used for the production of SiC substrates.   Figure 1 shows a schematic diagram of SiC crystal growth using the modified Lely method. In a graphite crucible heated above 2000°C, the SiC powder sublimates into molecular states such as Si2C, SiC2, and Si, which are then transported to the surface of the seed crystal. The atoms supplied move across the seed crystal surface and are incorporated into positions where the crystal is forming, thereby growing bulk SiC single crystals. An inert atmosphere, typically low-pressure argon, is used, and nitrogen is introduced during n-type doping.   The sublimation method is currently widely used for the preparation of SiC single crystals. However, compared to the method using molten liquid as the raw material for the growth of Si single crystals, the growth rate is relatively slow. Although the quality is gradually improving, the crystals still contain many dislocations and other issues. In addition to the sublimation method, attempts have also been made to prepare bulk SiC single crystals using methods such as liquid-phase growth through a solution or high-temperature chemical vapor deposition (CVD). Figure 2 shows a schematic diagram of the liquid-phase growth method for SiC single crystals. First, regarding the liquid-phase growth method, the solubility of carbon in a silicon solvent is very low. Therefore, elements such as Ti and Cr are added to the solvent to increase the solubility of carbon. Carbon is supplied by a graphite crucible, and the SiC single crystal grows on the surface of the seed crystal at a slightly lower temperature. The growth temperature is typically set between 1500°C and 2000°C, which is lower than that of the sublimation method. It has been reported that the growth rate can reach several hundred micrometers per hour. The advantage of the liquid-phase growth method for SiC is that, when growing crystals along the [0001] direction, dislocations extending in the [0001] direction can be bent to the vertical direction, sweeping them out of the crystal through the side walls. The screw dislocations extending along the [0001] direction are densely present in existing SiC crystals and are a source of leakage current in devices. The density of screw dislocations is significantly reduced in SiC crystals prepared using the liquid-phase growth method. Challenges in solution growth include increasing the growth rate, extending the length of the grown crystals, and improving the surface morphology of the crystals. High-temperature chemical vapor deposition (CVD) growth of SiC single crystals involves using SiH4 as the silicon source and C3H8 as the carbon source in a low-pressure hydrogen atmosphere, with growth occurring on the surface of an SiC substrate maintained at a high temperature (typically above 2000°C). The raw gases introduced into the growth furnace decompose into molecules such as SiC2 and Si2C in the hot-wall surrounded decomposition zone, and these are transported to the seed crystal surface, where single-crystal SiC is grown. The advantages of the high-temperature CVD method include the ability to use high-purity raw gases, and by controlling the gas flow rate, the C/Si ratio in the gas phase can be precisely controlled, which is an important growth parameter that affects defect density. In bulk SiC growth, a relatively fast growth rate can be achieved, exceeding 1mm/h. On the other hand, the disadvantages of the high-temperature CVD method include the significant accumulation of reaction by-products inside the growth furnace and exhaust pipes, which adds a considerable maintenance burden on the equipment. Additionally, gas-phase reactions generate particles in the gas stream, which can become impurities in the crystal. The high-temperature CVD method holds great potential as a method for producing high-quality bulk SiC crystals. Therefore, continuous development is underway to achieve lower costs, higher productivity, and lower dislocation density compared to the sublimation method. Furthermore, the RAF (Repeated A-Face) method is reported as a sublimation-based technique that produces bulk SiC crystals with fewer defects. In the RAF method, a seed crystal cut perpendicular to the [0001] direction is taken from a crystal grown along the [0001] direction, and SiC single crystals are grown on it. Then, another seed crystal is cut perpendicular to this new growth direction, and further SiC single crystals are grown. By repeating this cycle, dislocations are swept out of the crystal, resulting in bulk SiC crystals with fewer defects. The dislocation density of SiC crystals prepared using the RAF method is reported to be 1 to 2 orders of magnitude lower than that of standard SiC crystals.       ZMSH Sulotion for SiC wafer     2inch 4inch 6inch 8Inch Silicon Carbide Wafer Sic Wafers Dummy Research Prime Grade   A SiC wafer is a semiconductor material that has excellent electrical and thermal properties. It is a high-performance semiconductor that is ideal for a wide variety of applications. In addition to its high thermal resistance, it also features a very high level of hardness.  

Verticle's Wet Etching Technology Ready for Mass Production of AlGaInP Red Micro-LEDs   US-based R&D company Verticle has announced that its wet etching technology is now ready for mass production of AlGaInP red micro-LEDs. A major hurdle in the commercialization of high-resolution micro-LED displays is reducing the size of LED chips while maintaining efficiency, with red micro-LEDs being particularly susceptible to efficiency drops compared to their blue and green counterparts.   The primary cause of this efficiency reduction is sidewall defects created during plasma-based mesa dry etching. Up until now, no viable alternatives to dry etching have been developed, so efforts have largely focused on mitigating damage through post-dry-etching techniques such as chemical treatment, annealing, and passivation. However, these methods offer only partial recovery and are less effective for the tiny chips required for high-resolution displays, where sidewall defects can penetrate deep into the chip, sometimes exceeding its size.   Because of this, the search for "defect-free" etching methods has been ongoing for years. Wet etching has long been considered a potential solution due to its defect-free nature, but its isotropic characteristics can lead to undesirable undercutting, making it unsuitable for the etching of small chips like micro-LEDs.   However, Verticle, a San Francisco-based firm specializing in LED and display technologies, has recently made a significant breakthrough. The company has developed a defect-free wet chemical etching process for AlGaInP red micro-LEDs, specifically targeting the challenges of mesa etching.   CEO Mike Yoo has stated that Verticle is prepared to scale this wet etching technology for mass production, accelerating the commercial adoption of micro-LED displays for applications ranging from large screens to near-eye displays.     Comparing Sidewall Defects in Wet and Dry Etching   To better understand the impact of sidewall defects, Verticle compared wet and dry etched AlGaInP red micro-LEDs using Cathodoluminescence (CL) analysis. In CL, an electron beam generates electron-hole pairs within the micro-LED surface, and radiative recombination in the undamaged crystal produces bright emission images. Conversely, non-radiative recombination in damaged areas leads to little to no luminescence. CL images and spectra reveal a stark contrast between the two etching methods. Wet-etched AlGaInP red micro-LEDs exhibit much brighter emissions, with the emission area being more than three times larger than that of dry-etched LEDs, according to Mike Yoo.   Most notably, the sidewall defect penetration depth for dry-etched micro-LEDs is around 7 µm, while the depth for wet-etched micro-LEDs is nearly nonexistent, measuring less than 0.2 µm. Consequently, the effective mesa area of dry-etched red micro-LEDs is just 28 percent of that of wet-etched ones. These CL findings suggest that there are few, if any, sidewall defects present in the wet-etched AlGaInP red micro-LEDs.         At ZMSH, you can get more with our premium products. We offer DFB wafers with N-InP substrates, featuring active layers of InGaAlAs/InGaAsP, available in 2, 4, and 6 inches, specifically designed for gas sensor applications. Additionally, we provide high-quality InP FP epiwafers with n/p-type InP substrates, available in 2, 3, and 4 inches, with thicknesses ranging from 350 to 650 µm, ideal for optical network applications. Our products are designed to meet the precise requirements of advanced technologies, ensuring reliable performance and customization options.     DFB wafer N-InP substrate epiwafer active layer InGaAlAs/InGaAsP 2 4 6 inch for gas sensor   A Distributed Feedback (DFB) wafer on an n-type Indium Phosphide (N-InP) substrate is a critical material used in the production of high-performance DFB laser diodes. These lasers are essential for applications requiring single-mode, narrow-linewidth light emission, such as in optical communication, data transmission, and sensing. DFB lasers typically operate in the 1.3 µm and 1.55 µm wavelength ranges, which are optimal for fiber-optic communication due to the low-loss transmission in optical fibers.   （click the picture for more）   InP FP epiwafer InP substrate n/p type 2 3 4 inch with thickeness of 350-650um for optical net work   Indium Phosphide (InP) Epiwafer is a key material used in advanced optoelectronic devices, particularly Fabry-Perot (FP) laser diodes. InP Epiwafers consist of epitaxially grown layers on an InP substrate, designed for high-performance applications in telecommunications, data centers, and sensing technologies. （click the picture for more）        

  As the demand for high-efficiency, high-power, and high-temperature electronics continues to grow, the semiconductor industry is looking beyond traditional materials like silicon (Si) to meet these needs. One of the most promising materials leading this innovation is silicon carbide (SiC). In this article, we explore what SiC wafers are, how SiC semiconductors differ from traditional silicon-based ones, and the significant advantages they offer.     What is a SiC Wafer?     A SiC wafer is a thin slice of silicon carbide, a compound made from silicon and carbon atoms. Silicon carbide is known for its exceptional physical and chemical properties, making it an ideal material for a variety of electronic applications. Unlike traditional silicon wafers, SiC wafers are designed to handle high-power, high-temperature, and high-frequency conditions. These wafers serve as the substrate for manufacturing SiC semiconductors, which are rapidly gaining popularity in power electronics and other high-performance applications.         What is a SiC Semiconductor? A SiC semiconductor is an electronic component made using silicon carbide as its base material.   Semiconductors are essential in modern electronics, as they allow for the control and manipulation of electric currents. SiC semiconductors, specifically, are known for their wide bandgap, high thermal conductivity, and excellent electric field breakdown strength. These characteristics make SiC semiconductors ideal for use in power devices, such as power transistors, diodes, and MOSFETs, where efficiency, reliability, and performance are critical.     What is the Difference Between Si and SiC Wafers?     While silicon (Si) wafers have been the backbone of the semiconductor industry for decades, silicon carbide (SiC) wafers are quickly becoming a game-changer for certain applications. Here’s a detailed comparison of the two:   1. Material Properties:   Silicon (Si): Silicon is a widely used semiconductor material due to its abundant availability, mature fabrication technology, and good electrical properties. However, silicon's relatively narrow bandgap (1.12 eV) limits its performance in high-temperature and high-voltage applications. Silicon Carbide (SiC): SiC has a much wider bandgap (about 3.26 eV), which allows it to operate at much higher temperatures and voltages than silicon. This makes SiC a superior choice for applications that require efficient power conversion and heat dissipation.   2. Thermal Conductivity:   Silicon (Si): Silicon's thermal conductivity is moderate, which can lead to overheating in high-power applications unless extensive cooling systems are used. Silicon Carbide (SiC): SiC has nearly three times the thermal conductivity of silicon, meaning it can dissipate heat much more effectively. This reduces the need for bulky cooling systems, making SiC devices more compact and reliable under extreme conditions.   3. Electric Field Breakdown Strength:   Silicon (Si): Silicon's breakdown electric field is lower, which limits its ability to handle high-voltage operations without risk of breakdown. Silicon Carbide (SiC): SiC's electric field breakdown strength is about ten times greater than that of silicon. This allows SiC-based devices to handle much higher voltages, which is crucial for power electronics.   4. Efficiency and Power Losses:   Silicon (Si): While silicon devices are efficient under standard conditions, their performance drops significantly under high-frequency, high-voltage, and high-temperature conditions, leading to increased power losses. Silicon Carbide (SiC): SiC semiconductors maintain high efficiency across a wider range of conditions, particularly in high-frequency and high-power applications. This translates to lower power losses and better overall system performance.     Feature Si (Silicon) Wafers SiC (Silicon Carbide) Wafers Bandgap Energy 1.12 eV 3.26 eV Thermal Conductivity ~150 W/mK ~490 W/mK Electric Field Breakdown Strength ~0.3 MV/cm ~3 MV/cm Maximum Operating Temperature Up to 150°C Up to 600°C Power Efficiency Lower efficiency at high power and temperature Higher efficiency at high power and temperature Manufacturing Cost Lower cost due to mature technology Higher cost due to more complex manufacturing process Applications General electronics, integrated circuits, microchips Power electronics, high-frequency and high-temperature applications Material Hardness Less hard, more prone to wear Very hard, resistant to wear and chemical damage Heat Dissipation Moderate, requires cooling systems for high power High, reduces need for extensive cooling       The Future of Semiconductor Technology   The transition from silicon to silicon carbide is not just an incremental improvement; it's a significant leap forward for the semiconductor industry. As industries such as automotive, aerospace, renewable energy, and industrial automation demand more robust and efficient electronics, the advantages of SiC are becoming increasingly clear.   For example, in the automotive industry, the rise of electric vehicles (EVs) has created a demand for more efficient power electronics that can handle the high-power requirements of EV motors and charging systems. SiC semiconductors are now being integrated into inverters and chargers to improve efficiency and reduce energy losses, ultimately extending the range of EVs. Similarly, in renewable energy applications, such as solar inverters and wind turbines, SiC devices are helping to increase energy conversion efficiency, reduce cooling requirements, and lower overall system costs. This not only makes renewable energy more viable but also more cost-effective.       Conclusion The emergence of SiC wafers and semiconductors marks a new era in electronics, where higher efficiency, performance, and durability are paramount. As research and development continue, and as the production costs of SiC materials decrease, we can expect to see even more widespread adoption of this technology across various industries. Silicon carbide is poised to revolutionize the semiconductor industry, providing solutions to challenges that traditional silicon simply can't meet. With its superior properties and growing application base, SiC represents the future of high-performance electronics.     Related Recommendations     8inch SiC Wafer Silicon Carbide Wafer Prime Dummy Research Grade 500um 350 Um（click the picture for more）   Silicon carbide (SiC) initially found industrial use as an abrasive material and later gained significance in LED technology. Over time, its exceptional physical properties have led to its widespread adoption in various semiconductor applications across industries. With the limitations of Moore's Law approaching, many semiconductor companies are turning to SiC as the material of the future due to its outstanding performance characteristics.      

What is a Sapphire Wafer? A sapphire wafer is a thin slice of crystalline sapphire, a material that is widely known for its exceptional hardness and transparency. Sapphire, or aluminum oxide (Al₂O₃), is a crystalline form of corundum, and in its purest form, it is colorless and transparent. Sapphire wafers are extensively used in the electronics and optoelectronics industries, especially in applications that require a durable, high-performance substrate material.   Sapphire wafers’ exhibition Sapphire wafers’ data sheet   tandard wafer(customzied)2 inch C-plane sapphire wafer SSP/DSP 3 inch C-plane sapphire wafer SSP/DSP 4 inch C-plane sapphire wafer SSP/DSP 6 inch C-plane sapphire wafer SSP/DSP Special Cut A-plane (1120) sapphire wafer R-plane (1102) sapphire wafer M-plane (1010) sapphire wafer N-plane (1123) sapphire wafer C-axis with a 0.5°~ 4° offcut, toward A-axis or M-axis Other customized orientation Customized Size 10*10mm sapphire wafer 20*20mm sapphire wafer Ultra thin (100um) sapphire wafer 8 inch sapphire wafer Patterned Sapphire Substrate (PSS) 2 inch C-plane PSS 4 inch C-plane PSS 2inch DSP C-AXIS 0.1mm/0.175mm/0.2mm/0.3mm/0.4mm/0.5mm/ 1.0mmt SSP C-axis 0.2/0.43mm(DSP＆SSP) A-axis/M-axis/R-axis 0.43mm 3inch DSP/ SSP C-axis 0.43mm/0.5mm 4Inch dsp c-axis 0.4mm/ 0.5mm/1.0mmssp c-axis 0.5mm/0.65mm/1.0mmt 6inch ssp c-axis 1.0mm/1.3mmm dsp c-axis 0.65mm/ 0.8mm/1.0mmt   Specification for substrates   Orientation R-plane, C-plane, A-plane, M-plane or a specified orientation Orientation Tolerance ± 0.1° Diameter 2 inches, 3 inches, 4 inches, 5inch,6 inches, 8 inches or others Diameter Tolerance 0.1mm for 2 inches, 0.2mm for 3 inches, 0.3mm for 4 inches, 0.5mm for 6 inches Thickness 0.08mm,0.1mm,0.175mm,0.25mm, 0.33mm, 0.43mm, 0.65mm, 1mm or others; Thickness Tolerance 5μm Primary Flat Length 16.0±1.0mm for 2 inches, 22.0±1.0mm for 3 inches, 30.0±1.5mm for 4 inches, 47.5/50.0±2.0mm for 6 inches Primary Flat Orientation A-plane (1 1-2 0 ) ± 0.2°; C-plane (0 0-0 1 ) ± 0.2°, Projected C-Axis 45 +/- 2° TTV ≤7µm for 2 inches, ≤10µm for 3 inches, ≤15µm for 4 inches, ≤25µm for 6 inches BOW ≤7µm for 2 inches, ≤10µm for 3 inches, ≤15µm for 4 inches, ≤25µm for 6 inches Front Surface Epi-Polished (Ra< 0.3nm for C-plane, 0.5nm for other orientations) Back Surface Fine ground (Ra=0.6μm~1.4μm) or Epi-polished Packaging Packaged in a class 100 clean room environment   How Are Sapphire Wafers Made?   Sapphire wafers are manufactured through a process called the Czochralski method (or the Kyropoulos method), where large single-crystal sapphire boules are grown from molten aluminum oxide. These boules are then sliced into wafers of the desired thickness using a diamond wire saw. After slicing, the wafers undergo polishing to achieve a smooth, mirror-like surface.   Key Properties of Sapphire Wafers   Hardness: Sapphire ranks 9 on the Mohs scale of mineral hardness, making it the second-hardest material after diamond. This exceptional hardness makes sapphire wafers highly resistant to scratching and mechanical damage. Thermal Stability: Sapphire can withstand high temperatures, with a melting point of about 2,030°C (3,686°F). This makes it ideal for high-temperature applications where other materials might fail. Optical Transparency: Sapphire is highly transparent to a wide range of wavelengths, including visible, ultraviolet (UV), and infrared (IR) light. This property makes sapphire wafers ideal for use in optical devices, windows, and sensors. Electrical Insulation: Sapphire is an excellent electrical insulator with a high dielectric constant. This makes it suitable for applications where electrical isolation is critical, such as in certain types of microelectronics. Chemical Resistance: Sapphire is chemically inert and highly resistant to corrosion from acids, bases, and other chemicals, which makes it durable in harsh environments.     Applications of Sapphire Wafers   Light-Emitting Diodes (LEDs): Sapphire wafers are commonly used as substrates in the manufacturing of gallium nitride (GaN) LEDs, especially blue and white LEDs. The lattice structure of sapphire matches well with GaN, promoting efficient light emission. Semiconductor Devices: In addition to LEDs, sapphire wafers are used in radio-frequency (RF) devices, power electronics, and other semiconductor applications where a robust and insulating substrate is needed. Optical Windows and Lenses: Sapphire’s transparency and hardness make it an excellent material for optical windows, lenses, and camera sensor covers, often used in harsh environments such as aerospace and defense industries. Wearables and Electronics: Sapphire is used as a durable cover material for wearables, smartphone screens, and other consumer electronics, thanks to its scratch resistance and optical clarity. Sapphire Wafers vs. Silicon Wafers While sapphire wafers have distinct advantages in certain applications, they are often compared with silicon wafers, which are the most common substrate material in the semiconductor industry.   Silicon Wafers Silicon wafers are thin slices of crystalline silicon, a semiconductor material. They are the foundation of the modern electronics industry, used in the manufacturing of integrated circuits (ICs), transistors, and solar cells. Silicon wafers are known for their electrical conductivity, and their ability to be doped with impurities to enhance their semiconductor properties.     Electrical Conductivity: Unlike sapphire, silicon is a semiconductor, meaning it can conduct electricity under certain conditions. This property makes silicon ideal for making electronic devices like transistors, diodes, and ICs. Cost: Silicon wafers are generally less expensive to produce than sapphire wafers. This is because silicon is more abundant in nature, and the processes for silicon wafer manufacturing are more established and efficient. Thermal Conductivity: Silicon has good thermal conductivity, which is important for dissipating heat in electronic devices. However, it is not as thermally stable as sapphire in extreme temperature environments. Flexibility in Doping: Silicon can be easily doped with elements like boron or phosphorus to modify its electrical properties, which is a key factor in its widespread use in the semiconductor industry. Comparison: Sapphire Wafers vs. Silicon Wafers Property Sapphire Wafer Silicon Wafer Material Crystalline Aluminum Oxide (Al₂O₃) Crystalline Silicon (Si) Hardness 9 on Mohs scale (extremely hard) 6.5 on Mohs scale Thermal Stability Extremely high (melting point ~2,030°C) Moderate (melting point ~1,410°C) Electrical Properties Insulator (non-conductive) Semiconductor (conductive) Optical Transparency Transparent to UV, visible, and IR light Opaque Cost Higher Lower Chemical Resistance Excellent Moderate Applications LEDs, RF devices, optical windows, wearables ICs, transistors, solar cells Which One to Choose? The choice between sapphire and silicon wafers depends largely on the specific application:     Sapphire Wafers: Ideal for applications requiring extreme durability, high-temperature resistance, optical transparency, and electrical insulation. These are preferred in optoelectronics, particularly in LEDs, and in environments where mechanical strength and chemical resistance are essential. Silicon Wafers: The go-to choice for general semiconductor applications due to their semiconductor properties, cost-effectiveness, and the well-established manufacturing processes in the electronics industry. Silicon is the backbone of integrated circuits and other electronic devices. Future of Sapphire Wafers With the growing demand for more durable and high-performance materials in electronics, optoelectronics, and wearables, sapphire wafers are expected to play an increasingly important role. Their unique combination of hardness, thermal stability, and transparency makes them suitable for cutting-edge technologies, including next-generation displays, advanced semiconductor devices, and robust optical sensors. As the cost of sapphire wafer production decreases and the manufacturing processes improve, we can anticipate their wider adoption across industries, further solidifying their place as a critical material in modern technology.